PIC16F18877 Hardware Quick Reference

5

Device Specifications

The PIC16F18877 is an 8-bit microcontroller from Microchip’s enhanced mid-range PIC16 family. It combines an enhanced instruction set with configurable digital peripherals, analogue measurement facilities, flexible pin routing and on-chip non-volatile memory.

The programme-memory capacity is expressed in 14-bit instruction words. It should not be confused with a conventional byte-addressed Flash capacity.

Maximum clock frequency, voltage and temperature operating conditions must be checked together against the applicable electrical specifications.

CPU Architecture and Memory

The PIC16F18877 uses Microchip’s enhanced mid-range 8-bit architecture. Its instruction set includes arithmetic, logical, bit manipulation, branching and indirect memory-access operations.

The processor uses a working register, banked data memory and a hardware return stack.

The enhanced mid-range architecture provides a 16-level hardware return stack. Stack operation and overflow behaviour depend on the applicable configuration and control mechanisms.

Data memory banking

The device uses banked data memory. The BSR selects the bank containing the required general-purpose or special-function register.

In C, the compiler normally manages bank selection. Assembly-language routines must explicitly account for register banking and the available common memory regions.

A register name used on a PIC18 device must not be assumed to exist on the PIC16F18877, even where both devices provide the same peripheral function.

Memory types

EEPROM is suitable for infrequently updated settings, calibration data and configuration values. Its endurance and write timing must be considered when designing repeated-write applications.

Power Supply and Essential Connections

The PIC16F18877 operates from a supply voltage within the specified 1.8–5.5 V range, subject to clock-frequency and operating-condition restrictions.

Physical pin numbers differ between package variants. Use the correct package pin diagram when designing a PCB or connecting a development board.

Supply decoupling

Place a ceramic decoupling capacitor close to each supply pair.

A 100 nF ceramic capacitor is a conventional starting point. Additional capacitance may be required depending on the regulator, supply impedance and switching loads.

Keep the capacitor connections short and avoid routing high-current switching paths through sensitive analogue ground connections.

MCLR considerations

MCLR can provide an external reset function and is also involved in programming entry.

The circuit must not prevent the programming tool from applying the required programming-entry conditions.

Reset pull-up arrangements, filtering and any external reset circuitry should follow the device programming specifications.

GPIO Register Reference

The PIC16F18877 provides GPIO ports with configurable digital and analogue functions.

The main register groups are:

The suffix x represents the port letter.

Not every bit position is implemented on every port.

GPIO direction

TRIS bit = 1: Input
TRIS bit = 0: Output

Digital output example

The following XC8 fragment configures RB0 as a digital output.

#include <xc.h>

void gpio_init(void)
{
    ANSELBbits.ANSELB0 = 0;
    LATBbits.LATB0 = 0;
    TRISBbits.TRISB0 = 0;
}

The output latch is initialised before enabling the output driver.

Digital input example

ANSELBbits.ANSELB1 = 0;
TRISBbits.TRISB1 = 1;

if (PORTBbits.RB1 != 0)
{
    // Input is high
}

The input requires a valid external logic level. A floating input can produce unpredictable readings and unnecessary switching current.

PORT versus LAT

Use PORTx to read the actual pin state and LATx to change an output.

Writing through LAT avoids the read-modify-write behaviour that can occur when modifying PORT registers while an output pin is externally loaded.

Analogue and Digital Pin Configuration

Several PIC16F18877 pins support both analogue and digital functions.

An analogue-enabled pin may not behave as expected when read through the digital input circuitry.

A peripheral’s ownership of a pin can affect ordinary GPIO behaviour. Check pin multiplexing when a GPIO appears unresponsive.

Peripheral Pin Select

Peripheral Pin Select (PPS) allows supported peripheral inputs and outputs to be routed to compatible physical pins.

This reduces the need to select a particular pin solely because it has a fixed serial or timer function.

PPS configuration sequence

1. Identify the required peripheral signals.
2. Check the eligible pins in the PPS mapping tables.
3. Configure analogue and digital pin modes.
4. Set appropriate TRIS directions.
5. Unlock PPS if required.
6. Assign peripheral inputs and outputs.
7. Lock PPS if required.
8. Configure and enable the peripheral.

Important: PPS input and output routing are separate operations. Assigning an SPI output does not automatically select the corresponding SPI input.

PPS function codes must be obtained from the PIC16F18877 documentation. Codes from another PIC16 device may not be compatible.

Oscillator and Clock System

The PIC16F18877 provides an internal oscillator system and supports external clock arrangements.

The maximum supported oscillator frequency is 32 MHz.